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ADM1034
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19
3. Read the status register to identify the interrupt
source.
4. Mask the interrupt source by setting the
appropriate mask bit in the interrupt mask registers
(from Reg. 0x08 to Reg. 0x0A).
5. Take the appropriate action for a given interrupt
source.
6. Exit the interrupt handler.
7. Periodically poll the status register. If the interrupt
status bit clears, reset the corresponding interrupt
mask bit to 0. The SMBusALERT
 output and
status bits then behave as shown in Figure 31.
Figure 31. Handling SMBusALERT
TEMPERATURE
INTERRUPT MASK BIT
CLEARED
(SMBusALERT REARMED)
CLEARED ON READ
(TEMP BELOW LIMIT)
INTERRUPT
MASK BIT SET
HIGH LIMIT
SMBusALERT
STICKY
STATUS BIT
TEMP BACK IN LIMIT
(STATUS BIT STAYS SET)
Interrupt Masking Register
Mask Registers 1, 2, and 3 are located at Addresses 0x08,
0x09, and 0x0A. These allow individual interrupt sources to
be masked out to prevent the SMBusALERT
  interrupts.
Masking   the   interrupt   source   prevents   only   the
SMBusALERT
 from being asserted; the appropriate status bit
is still set as normal.
Table 20. MASK REGISTER 1 (REG. 0X08)
Bit #
Name
Description
7
LH
1 masks the ALERT
 for the local high
temperature.
6
LL
1 masks the ALERT
 for the local low
temperature.
5
R1H
1 masks the ALERT
 for the Remote 1
high temperature.
4
R1L
1 masks the ALERT
 for the Remote 1
low temperature.
3
R1D
1 masks the ALERT
 for the Remote 1
diode errors.
2
R2H
1 masks the ALERT
 for the Remote 2
high temperature.
1
R2L
1 masks the ALERT
 for the Remote 2
low temperature.
0
R2D
1 masks the ALERT
 for the Remote 2
diode errors.
Table 21. MASK REGISTER 2 (REG. 0X09)
Bit #
Name
Description
7
Res
Reserved
6
Res
Reserved
5
Res
Reserved
4
T%
1 masks the ALERT
 for the THERM
 %
on-time limit.
3
TA
1 masks the ALERT
 for the THERM
 limit
being exceeded and the THERM
 output
signal being asserted.
2
TS
1 masks the ALERT
 for the THERM
 state;
has no effect on ALERT
 in ALERT
 comp
mode.
1
Res
Reserved
0
Res
Reserved
Table 22. MASK REGISTER 3 (REG. 0X0A)
Bit #
Name
Description
7
F1S
1 masks the ALERT
 for Fan 1 stalling.
6
FA
1 masks the ALERT
 for fans at ALARM
speed.
5
F2S
1 masks the ALERT
 for Fan 2 stalling.
4
Res
Reserved
3
Res
Reserved
2
Res
Reserved
1
Res
Reserved
0
Res
Reserved
FAN_FAULT
 Output
The FAN_FAULT
 output signals when one or both of the
fans stall. Pin 8, the FAN_FAULT
 output, is a dual-function
pin. It defaults to being a FAN_FAULT
 output but can be
reconfigured as an analog input reference for the THERM
input. To do this, set the FAN_FAULT
/REF (Bit 7) in
Configuration Register 4 (Address 0x04) to 1.
Fault Queue
The ADM1034 has a programmable fault queue option
that lets the user program the number of out-of-limit
measurements allowable before generating an ALERT
. The
fault queue affects only temperature measurement channels
and is only operational in SMBusALERT
 mode. It performs
some simple filtering, which is particularly useful at the
higher    conversion    rates    (16,    32,    and    64
conversions/second), where averaging is not carried out.
There is a queue for each of the temperature channels. If
L (the number programmed to the fault queue) or more
consecutive out-of-limit readings are made on the same
temperature channel, the fault queue fills, and the
SMBusALERT
 output triggers. To fill the fault queue, one
needs L or more consecutive out of limits on the internal
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